This page contains helpful notes about Device Tree configurations and Device Driver details
RZ Evaluation Board Files
Device Tree files for Renesas SoC and evaluation boards are under the directoryarch/arm64/boot/dts/renesas/
Below is the list of Device Tree files used for the Renesas Evaluation boards.
Because the evaluation kits share common boards, and have many different test/demo configurations, there are many include files (.dtsi) for any single device tree (.dts) build. For your custom board, you might only need your Device Tree for your board (my_board.dst) and that will only #include one other file which will be the base SoC file (RZ/G2H for example will #include "r8a774e1.dtsi").
RZ board names that end in "-dev" are internal Renesas boards. While their Device Trees files appear in the BSP, they are not mainlined.
If you to see a list of which peripheral nodes are set in each file, you can use this "dts_parser" tool below. For example, you want to find all the the .dtsi files that configure the i2c channels because you are looking for examples.
The .dtsi file for each SoC will have a "compatible" string to specify that SoC it is. If you decide to make your own top level compatible, make sure you include the original SoC string. The reason is that some drivers (the VSP driver for example) look for that SoC string to know what SoC they are running on. If it is missing, it will not load or run correctly.
Here is a correct example of a .dts file for a RZ/G2L board. Notice how "renesas,r9a07g044" is at the end of the line.
Helpful Debug Messages:Sometimes it is helpful to see how the pins are being configured on boot up. By putting#define DEBUGat the top of the driver file (pinctrl.c or pinctrl-rzg2.c) will make it print out how each pins is being configured.
Ports NodeWhen defining ports { } (meaning more than 1 port), you must set#address-cells = <1>;and#size-cells = <0>;. For more information, see the documentation in the kernel source: Documentation/devicetree/bindings/media/video-interfaces.txt
Resolution and Clock Definitions:An LCD Panel will have it's own separate driver. That driver will define the clock rate and resolution. The Renesas LCD driver will then get that information in order to set up the LCD controller (DU) output.
MIPI DCS Commands:Many (most) MIPI DSI Panels require setup command (DCS) to be set over MIPI DSI to configure the panel's controller before pixel data can be sent. This is why there is usually a separate driver for each LCD since these commands are specific to each LCD panel.
Simple-Panel Driver:If your panel requires no special setup (no MIPI DSI DCS commands) or your system is configuring your LCD manually over I2C, or you are using a parallel RGB panel that typically requires no setup, you can use the kernel's "simple-panel" driver.
The main reason is that you need to tell the kernel about the resolution and pixel timing is of your panel, but that information is not described in a Device Tree, it must come from a source code driver file. The panel-simple driver is there as a way to do that by simply adding in a new entry for your custom panel.
Note that you will be required to edit the driver file (drivers/gpu/drm/panel/panel-simple.c) to add your specific panel resolution and timing that you want.
It is possible to set all your timing parameters in the Device Tree an not edit the panel-simple.c driver. You do this by specifying compatible = "panel-dpi". See example below
You must set CONFIG_DRM_PANEL_SIMPLE=y in your kernel to use this driver.
See kernel documentation Documentation/devicetree/bindings/panel/simple-panel.txt.
Parallel RGB LCD:Since a parallel LCD does not need any special setup, you can use simple-panel driver in the kernel.
Check Display Settings:You can use the commandmodetest -M rcar-du -cto check the status of your display driver. It will also show you the supported resolutions of your display (in the case that you are using an HDMI interface where it will read what is supported by the HDMI panel).
Check VBLANK Timings:You can use the commandvbltest -M rcar-du to check the VBLANK timings. If your result is always around 60Hz, your panel is set correctly.
Device Tree Examples:
RZ/G2L: MIPI-CSI to HDMI Bridge: See device tree for evaluation board.
We want to use simple panel driver and add the device node
panel_rgb: panel-rgb {
compatible = "arm,rtsm-display"; //<-- this property "arm,rtsm-display" is an example.
// please fill in the correct information based on your panel spec.
port {
panel_in_rgb: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
};
If you do not want to edit the panel-simple.c file, you can use compatible = "panel-dpi" and then enter your LCD timings in the Device Tree.
Here is an example of attaching a parallel RGB LCD to a RZ/G2L and using "panel-dpi" and only using the Device Tree. The driver panel-simple.c does not have to be modified.
Remember, the kernel configuration CONFIG_DRM_PANEL_SIMPLE=y must be set.
panel {
/*
* Define code for panel here such as compatible, backlight, power,...
* Can refer drivers/gpu/drm/panel/panel-simple.c
*/
port {
panel_in: endpoint {
remote-endpoint = <&rgb_out>;
};
};
};
The Link Status input pin (LINKSTA) is not used. The driver instead relies on the PHY to inform it that the link is up by using in-band status messages on the RGMII lines.
Do not forget to set thecorrect voltage levelsfor the pins (3.3v, 1.5v, etc..) in the device tree in thepinctrl node.
You use the syntax "power-source = <3300>;" when you declare the pins for Ethernet. If an Ethernet PHY supports multiple voltages (3.3v or 1.8v), then choose the lower voltage because the Electrical Characteristics are better.
Refer to thepinctrl documentationin the kernel for more info.
In the Device Tree, the MDIO address is set by @xand the "reg =<x>;" For example, MDIO address of 0:
phy0: ethernet-phy@0 {
reg = <0>;
If using MII (not RGMII), do not include output-enable; in txc{ } in your Device Tree. For RGMII, TX_CLK is always an output. But for MII, TX_CLK pin needs to be an input, so output-enable should not be set.
Once the built is done, update your kernel and device tree with newly built.
2. Connect the SSD adapter board to RZ/G2H PCIe slot and check PCIe:
$ root@hihope-rzg2h:~# lspci 00:00.0 PCI bridge: Renesas Technology Corp. Device 0025 01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM981/PM981/PM983 $ root@hihope-rzg2h:~# lsblk NAME MAJ:MIN RM SIZE RO TYPE MOUNTPOINT mmcblk0 179:0 0 29.7G 0 disk `-mmcblk0p1 179:1 0 29.7G 0 part mmcblk0boot0 179:8 0 31.5M 1 disk mmcblk0boot1 179:16 0 31.5M 1 disk mmcblk1 179:24 0 14.9G 0 disk |-mmcblk1p1 179:25 0 512M 0 part `-mmcblk1p2 179:26 0 1.8G 0 part / nvme0n1 259:0 0 238.5G 0 disk # recognized the NVME SSD
3. Create a partition on the nvme to use
$ root@hihope-rzg2h:~# fdisk /dev/nvme0n1 Choose "n" to create a new partition Choose "P" then "1" to create a new primary partition Use defaults for the sector numbers Then "w" to write the data to the disk
After partition, "lsblk" command shows this:
$ root@hihope-rzg2h:~# lsblk NAME MAJ:MIN RM SIZE RO TYPE MOUNTPOINT mmcblk0 179:0 0 29.7G 0 disk `-mmcblk0p1 179:1 0 29.7G 0 part mmcblk0boot0 179:8 0 31.5M 1 disk mmcblk0boot1 179:16 0 31.5M 1 disk mmcblk1 179:24 0 14.9G 0 disk |-mmcblk1p1 179:25 0 512M 0 part `-mmcblk1p2 179:26 0 1.8G 0 part / nvme0n1 259:0 0 238.5G 0 disk `-nvme0n1p1 259:1 0 238.5G 0 part # new partition
$ root@hihope-rzg2h:~# mkdir /mnt/nvme root@hihope-rzg2h:~# mount /dev/nvme0n1p1 /mnt/nvme [ 970.462102] EXT4-fs (nvme0n1p1): recovery complete [ 970.468717] EXT4-fs (nvme0n1p1): mounted filesystem with ordered data mode. Opts: (null)
6. Create file to write/read:
$ root@hihope-rzg2h:~# touch /mnt/nvme/testfile
7. Example for PCIe performance measured on PCIe Slot port of RZ/G2H, and with a Samsung NVMe SSD PM981a:
root@hihope-rzg2h:~# echo 3 > /proc/sys/vm/drop_caches # to drop both page cache and dentries/inodes
[ 498.378440] sh (620): drop_caches: 3
root@hihope-rzg2h:~# dd if=/dev/zero of=/mnt/nvme/testfile bs=200M count=50 oflag=direct
50+0 records in
50+0 records out
10485760000 bytes (10 GB, 9.8 GiB) copied, 29.009 s, 361 MB/s
root@hihope-rzg2h:~# echo 3 > /proc/sys/vm/drop_caches
[ 616.062183] sh (620): drop_caches: 3
root@hihope-rzg2h:~# dd if=/mnt/nvme/testfile of=/dev/null bs=200M count=50 iflag=direct
50+0 records in
50+0 records out
10485760000 bytes (10 GB, 9.8 GiB) copied, 24.6171 s, 426 MB/s
USB
Linux Drivers
RZ/G2H, G2M, G2N, G2E:
RZ/G2L, G2LC, G2UL, V2L:
Host
(uses standard EHCI and XHCI kernel drivers since H/W API is fixed)
drivers/usb/host/ehci-hcd.c
drivers/usb/host/ehci-platform.c
drivers/usb/host/xhci.c
drivers/usb/host/xhci-rcar.c
CONFIG_USB_EHCI_HCD=y
CONFIG_XHCI_PLATFORM=y
CONFIG_XHCI_RCAR=y
Device
drivers/usb/renesas_usbhs/*
USB_RENESAS_USBHS=y
PHY
The PHY is a separate H/W block. Also used to control host/device switching for OTG.
drivers/phy/renesas/*
CONFIG_PHY_RCAR_GEN3_USB2=y
CONFIG_PHY_RCAR_GEN3_USB3=y
Notes
Disable OverCurrent Protection Interrupts:
If you did not connect the USB_OVCUR pin on your board, and it floats, you will get interrupt messages about over current. However, you can disable this interrupt by modifying the setting for the OHCI HcRhDescriptorA Register and setting bit NOCP to '1'. Search for "HcRhDescriptorA" in the hardware manual for more information.
In the kernel, in file drivers/usb/host/ohci-hcd.c, you want to comment out the line:
/* Configure for per-port over-current protection by default */ val &= ~RH_A_NOCP;
In u-boot, can see this is sometimes done for Renesas boards. See file board/renesas/rzg2l-dev/rzg2l-dev.c
If you are using a device as OTG (On-the-Go) and want to change from device to you, you set a sysfs setting under the PHY driver (not the USB controller driver)
Same as eMMC:The drivers for SD Card and SDIO are the same as eMMC. Please the section on eMMC.
3.3v Only: If you only provide 3.3v (do not support dynamically switching to 1.8v for UHS), then you should add theno-1-8-v;flag to the sdhi node. This flag is used for both kernel and u-boot device trees.
vmmc-supply:This is the voltage regulator connected to the SD card VDD pin. It could be a constant fixed 3.3v, or it be attached to a regulator that you can turn off to save power.
vqmmc-supply:This is the voltage regulator that the pull-ups for the data lines go to. For high speed SD, they will change from 3.3v to 1.8v.
CONFIG_MMC_SDHI_INTERNAL_DMAC=y (selected automatically by MMC_SDHI)
CONFIG_MMC_TMIO_CORE=y (selected automatically by MMC_SDHI)
Notes
Combo driver for MMC + SDHI HW
The core of the SDHI code is using the TMIO (Toshiba Mobile IO) driver because it is the same HW block and they have shared the same driver for many years.
CONFIG_MMC_SDHI_SYS_DMAC=y is selected automatically by MMC_SDHI, but is only for RZ/G1 series devices.
Note that if you are using more than one mmc/sdhi channel, you might run into the issue that you don't get the same device number (ie, /dev/mmcblk0) each time you boot. To fix this, simply add an 'alias' to the top of your Device Tree to make each channel a fixed number. As an example:
You can find some explanation in the kernel documentation:Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
'#dma-cells':
const: 1
description:
The cell specifies the encoded MID/RID values of the DMAC port
connected to the DMA client and the slave channel configuration
parameters.
bits[0:9] - Specifies MID/RID value
bit[10] - Specifies DMA request high enable (HIEN)
bit[11] - Specifies DMA request detection type (LVL)
bits[12:14] - Specifies DMAACK output mode (AM)
bit[15] - Specifies Transfer Mode (TM)
These values are what get written directly to the DMA registers. Also, the values for these bits are fixed and shown in a table in the hardware manual.
If you look in the Direct Memory Access Control (DMA) chapter in the hardware manual, you will find the table "On-Chip Module Requests"
compatible = "renesas,rcar-gen3-iic"(I2C for PMIC)
drivers/i2c/busses/i2c-sh_mobile.c
CONFIG_I2C_SH_MOBILE=y
RZ/G2L, G2LC, G2UL, V2L:
drivers/i2c/busses/i2c-riic.c
CONFIG_I2C_RIIC=y
Notes
The frequency for the driveri2c-rcar.cis hard coded to 100kHz. If you want to change it, you have to modify function rcar_i2c_clock_calculate( )
Device Tree Examples
(see device tree for evaluation board)
SPI
Linux Drivers
MSIOF: RZ/G2H, G2M, G2N, G2E:
CONFIG_xxx=y
RSPI: RZ/G2L, G2LC, G2UL, V2L:
drivers/spi/spi-rspi.c
CONFIG_SPI_RSPI=y
Notes
spidev:
If you want a generic SPI device (/dev/spi-0), in the past you would allocate acompatible = "spidev";node. Unfortunately, that spidev name has been removed from Linux (since Linux-5.17). However, you can still create a spidev device by simply using another name that is already in the kernel. The compatible name will be different, but it will work the exact same way.
Below is the list of device that can be used with spidev from filedrivers/spi/spidev.c
it means this nor flash is not supported in the Linux kernel. To support this flash, you should add this flash info in "static const struct flash_info atmel_parts[]" in drivers/mtd/spi-nor/atmel.c:
CAN-FD is enabled by default. To switch to CAN protocol, a user can add property "renesas,no-can-fd" in the Device Tree
Device Tree Examples
(see device tree for evaluation board)
ADC
Linux Drivers
RZ/G2H, G2M, G2N, G2E:
CONFIG_xxx=y
RZ/G2L, G2LC, G2UL, V2L:
CONFIG_xxx=y
Notes
Device Tree Examples
(see device tree for evaluation board)
Watchdog Timer(WDT)
Linux Drivers
RZ/G2H, G2M, G2N, G2E:
rz_linux-cip/drivers/watchdog/renesas_wdt.c
CONFIG_RENESAS_WDT
RZ/G2L, G2LC, G2UL, V2L:
rz_linux-cip/drivers/watchdog/rzg2l_wdt.c
CONFIG_RENESAS_RZG2LWDT
Notes
When rebooting the system, the watchdog timer is used. Simply type the command line "reboot" in the console.
To test a watch dog timeout/reboot, enter this command in the console "cat >> /dev/watchdog", then press ENTER again, then wait 1 minutes, and the board should reboot.
RZ/G2L: Reset on a WDT Timeout:There is a register in the CPG (WDT Reset Selector Register - CPG_WDTRST_SEL) to control if the WDT will reset the system or not. To generate a system RESET, you need to set it to 0x00010001. You can do this in u-boot, or when the kernel boots (in the CPG driver, not the WDT driver).
# Add this code to u-boot
#define CPG_WDTRST_SEL (CPG_BASE + 0xB14)
*(volatile u32 *)(CPG_WDTRST_SEL) = 0x00010001;
- or -
# Add this code to the kernel CPG driver
# FILE: drivers/clk/renesas/rzg2l-cpg.c
# FUNCTION: rzg2l_cpg_probe()
# LINE: Before the 'return 0;' at the end of the funtion
writel(0x00010001, (priv->base + 0xB14));
RZ/G2L: Toggle WDTOVF_PERROUT#Note that by default, theWDTOVF_PERROUT#pin will not toggle on a WDT reboot. You need to set the CPG_WDTRST_SEL register manually in u-boot since Linux never touches that register. For example: